|0xE000-0xE7FF||CPU RAM (B8)|
|0xF000-0xF7FF||Video RAM (F3)|
Z80 Port Map
|0xF0||In||Control panel input. Only lower 6 data bits are used. Active low.
|0xF1||In||Control panel input. Only lower 6 data bits are used. Active low.
|0xF2||In||Control panel input. Only lower 6 data bits are used.|
|0xF3||In||Control panel input. Only lower 6 data bits are used.|
|0xF4||In/Out||LD-V1000 data. Writing queues a command to be sent on the next command strobe. Reading reads the most recent byte received during last the status strobe.|
|0xF8||Out||0 disables start 1 button lamp. 1 enables.|
|0xF9||Out||Start 2 button lamp. 0 disables, 1 enables.|
|0xFA||Out||0 disables action button lamp. 1 enables.|
|0xFB||Out||0 disables joystick lamp. 1 enables.|
|0xFE||Out||0 holds IRQ' line high (disabled) by forcing a latch to be clear. 1 stops forcing latch to be clear, which allows IRQs to set the latch.|
|0xFF||Out||0 holds NMI' line high (disabled) by forcing a latch to be clear. 1 stops forcing latch to be clear, which allows NMIs to set the latch.|
NMI: Caused by LD-V1000 status strobe going low (becoming active)
IRQ: Caused by D2 output (pin 10) on vertical PROM (C6) transitioning from 0 to 1. This ends up being 60 Hz (vsync).
Video RAM Structure
Screen is divided into 32x32 tiles. The first tile is the top left.
0xF000-0xF3FF contain which tile to show.
0xF400-0xF7FF contain tile attributes. For example, 0xF400 would have attributes about the tile index at 0xF000.
|0-3||Which color palette to use for the tile.|
|6-7||Blink frequency. 0: no blinking, 1: blink at about 15 Hz, 2: blink at about 7.5 Hz, 3: blink at about 4.3 Hz ; The blink frequency is controlled by the Z80 program, and is not a hardware restriction.|
H and V PROMs are MB7052. MB7052 may compatible with 82s129 proms. Both PROMs may overheat and require heat sinks. Through experimentation, I've concluded that an extra large heat sink is needed to ensure stability. Digikey part HS115-ND seems a good choice. I've used thermal epoxy to secure the heat sink to the PROM with good results (so far). I use a sharpie to mark the bottom of the chip to indicate whether it's the H or V PROM.
For a possible replacement: http://callanbrown.com/index.php/flep-prom-replacement-adapters
RGB PROM is MB7124. MB7124 are compatible with 82s147 proms. Haven't found any other replacement yet.
Newer EEPROMs may be fast enough. W27C512 may be a commonly available EEPROM.
Sampled from pin 1 of the audio connector on the Esh PCB (CN1).
D2 on the Esh PCB will connect lamp lines to ground when the lamp is to be enabled. Therefore, if testing with, for example, a 20mA LED and 12V power, you would need to to wire one end of the LED to 12V and a 820 ohm resistor, and the other end to the output of one of the D2 lines. Once a path to ground is created, the LED will light up.
- LAMP_JOYSTICK will light up when a valid joystick move needs to be made in order to not die.
- LAMP_ACTION will light up when a valid action button move needs to be made in order to not die.
- LAMP_START1 and LAMP_START2 light up when the associated buttons may be pressed to start a game.
Unplug edge connector and apply only 5V/GND to PCB edge. Unplugging edge connector removes ambiguity about whether timing is coming from laserdisc player sync or PCB-generated sync (which is slightly different).
Check B7, pin 3. Must be stable 18.432 MHz clock. If not stable, check resistors/cap near clock.
Check B7, pin 10. Must be stable 6.144 MHz clock. If not stable, check B3 and A5.
Check B6, pin 14. Must be stable 15.63 kHz clock. If not stable, check H PROM (C5) and all of the horizontal counters (B6, B5, B4, and B3). Strongly consider adding heat sink to H PROM.
Check D7, pin 12. Must be stable 59.5 Hz clock. If not, check vertical counters (C7, D7) and V PROM (C6). Strongly consider adding heat sink to V PROM.
Check H7, pin 9 (CPU clock source). Must be stable 3.07 MHz clock.