CliffHangerNotes
From DaphneWiki
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|3-10 | |3-10 | ||
|AD7-AD0 | |AD7-AD0 | ||
| - | |[output] DRAM address output | + | |[output] DRAM address output, AD0 is most significant |
|- | |- | ||
|11 | |11 | ||
|R/W' | |R/W' | ||
| - | |[output] DRAM read/write output | + | |[output] DRAM read/write' output |
|- | |- | ||
|12 | |12 | ||
| Line 49: | Line 49: | ||
|25-32 | |25-32 | ||
|RD7-RD0 | |RD7-RD0 | ||
| - | |[input/output] DRAM data bus | + | |[input/output] DRAM data bus, RD0 is most significant |
|- | |- | ||
|33 | |33 | ||
| Line 57: | Line 57: | ||
|34 | |34 | ||
|RST'/SYNC | |RST'/SYNC | ||
| - | |[input] reset when low (under 0.6V), can be used to indicate 'sync active' when voltage is 10-12. It appears that cliff hanger does use this to sync to the laserdisc video. Reset and sync are inactive when voltage is between 3.5-6 V. | + | |[input] reset when low (under 0.6V), can be used to indicate 'sync active' when voltage is 10-12 (or above 9V). It appears that cliff hanger does use this to sync to the laserdisc video. Reset and sync are inactive when voltage is between 3.5-6 V. This is also referred to as a "sync input for EXTVDP". |
|- | |- | ||
|35 | |35 | ||
| Line 65: | Line 65: | ||
|36 | |36 | ||
|Y | |Y | ||
| - | |[output] analog color channel output | + | |[output] analog color channel output, may also include composite sync |
|- | |- | ||
|37 | |37 | ||
| - | | | + | |CPUCLK |
| - | | | + | |[output] not used |
|- | |- | ||
|38 | |38 | ||
| Line 77: | Line 77: | ||
|39 | |39 | ||
|XTAL2 | |XTAL2 | ||
| - | |[input] clock input | + | |[input] clock input, 10.738635 MHz |
|- | |- | ||
|40 | |40 | ||
|XTAL1 | |XTAL1 | ||
| - | |[input] clock input | + | |[input] clock input, 10.738635 MHz |
|} | |} | ||
Revision as of 18:23, 7 October 2016
Cliff Hanger
TMS 9128 NL info
Pin-Out
| Pin | Name | Description |
| 1 | RAS' | [output] RAS' DRAM strobe |
| 2 | CAS' | [output] CAS' DRAM strobe |
| 3-10 | AD7-AD0 | [output] DRAM address output, AD0 is most significant |
| 11 | R/W' | [output] DRAM read/write' output |
| 12 | VSS | Ground |
| 13 | MODE | [input] VDP register mode |
| 14 | CSW' | [input] chip select write strobe |
| 15 | CSR' | [input] chip select read strobe |
| 16 | INT' | [output] chip generated interrupt at the start of new vblank |
| 17-24 | CD7-CD0 | [input/output] 8-bit data bus to whatever is controlling the VDP (usually the CPU). CD0 is the most significant bit. |
| 25-32 | RD7-RD0 | [input/output] DRAM data bus, RD0 is most significant |
| 33 | VDD | power supply, 5V |
| 34 | RST'/SYNC | [input] reset when low (under 0.6V), can be used to indicate 'sync active' when voltage is 10-12 (or above 9V). It appears that cliff hanger does use this to sync to the laserdisc video. Reset and sync are inactive when voltage is between 3.5-6 V. This is also referred to as a "sync input for EXTVDP". |
| 35 | B-Y | [output] analog color channel output |
| 36 | Y | [output] analog color channel output, may also include composite sync |
| 37 | CPUCLK | [output] not used |
| 38 | R-Y | [output] analog color channel output |
| 39 | XTAL2 | [input] clock input, 10.738635 MHz |
| 40 | XTAL1 | [input] clock input, 10.738635 MHz |
